Difference between revisions of "Arquitectura de computadores"

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Volver a [[Cursos|Cursos]]
 
Volver a [[Cursos|Cursos]]
  
''' Arquitectura de Computadores - Código 22966 '''
+
'''Arquitectura de Computadores - Código 22966'''
  
 
[https://sites.google.com/site/carlosjaimebh/ Carlos Jaime Barrios Hernández] - (cbarrios@uis.edu.co) Auxiliatura Técnica-Académica : John Anderson García Henao, Ing.
 
[https://sites.google.com/site/carlosjaimebh/ Carlos Jaime Barrios Hernández] - (cbarrios@uis.edu.co) Auxiliatura Técnica-Académica : John Anderson García Henao, Ing.
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===== Lista de Trabajos =====
 
===== Lista de Trabajos =====
  
'''Trabajo 1 : Brain-Computer Interfaces: Beyond Medical Applications '''
+
====== Trabajo 1 : Brain-Computer Interfaces: Beyond Medical Applications ======
Brain-computer interaction has already moved from assistive care to applications such as gaming. Improvements in usability, hardware, signal processing, and system integration should yield applications in other nonmedical areas. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/ballTb3SEn9XlIy [1]]
+
Brain-computer interaction has already moved from assistive care to applications such as gaming. Improvements in usability, hardware, signal processing, and system integration should yield applications in other nonmedical areas. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/ballTb3SEn9XlIy [1]]  
'''Trabajo 2 : The Netflix Challenge: Datacenter Edition '''
+
====== Trabajo 2 : The Netflix Challenge: Datacenter Edition ======
The hundreds of thousands of servers in modern warehouse-scale systems make performance and efficiency optimizations pressing design challenges. This work presents ADSM, a scalable and efficient recommendation system for application-to-server mapping in large-scale datacenters (DCs) that is QoS-aware. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/3P1V3X8Mlxd8joN [2]]
+
The hundreds of thousands of servers in modern warehouse-scale systems make performance and efficiency optimizations pressing design challenges. This work presents ADSM, a scalable and efficient recommendation system for application-to-server mapping in large-scale datacenters (DCs) that is QoS-aware. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/3P1V3X8Mlxd8joN [2]] '''Trabajo 3: The Need for Power Debugging in the Multi-Core Environment ''' Debugging an application for power has a wide array of benefits ranging from minimizing the thermal hotspots to reducing the likelihood of CPU malfunction. In this work, we justify the need for power debugging, and show that performance debugging of a parallel application does not automatically guarantee power balance across multiple cores Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/OmFRGor28KAVWS3 [3]] '''Trabajo 4: Re-imagining the Scientific Visualization Interaction Paradigm ''' In recent years, powerful scientific visualization tools have emerged but the potential to closely couple these techniques with natural, physical, spatial human-computer interfaces remains largely untapped. To address these issues we outline a research agenda consisting of six major challenges for natural interfaces for visualization. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/8uCAe3GH3evCq2k [4]] '''Trabajo 5: On the Use of Commodity Ethernet Technology in Exascale HPC Systems ''' Exascale systems will require large networks with hundreds of thousands of endpoints. This work identifies the major differences in network requirements from both environments. Based on them, it studies the application of Ethernet to Exascale HPC systems, considering the topology, routing, forwarding table management, and address assignment, with a focus on performanceand power. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/oUBDtWz0HwjEyrT [5]] '''Trabajo 6: Experiences in Speeding Up Computer Vision Applications on Mobile Computing Platforms ''' Computer vision (CV) is widely expected to be the next big thing in mobile computing. n this paper, we investigate ways to speed up demanding CV applications to run faster on mobile devices. We selected KinectFusion (KF) as a representative CV application. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/8UWPJtyH75vaBbY [6]] '''Trabajo 7: Beyond Weiser: From Ubiquitous to Collective Computing ''' Considering the technological changes across computing’s first three generations, how might the next serve humanity? Three critical technologies—the cloud, the crowd, and the shroud of devices connecting the physical and digital worlds—define the fourth generation of collective computing. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/p1ko5UZpARions1 [7]] '''Trabajo 8: Supercomputing with Commodity CPUs: Are Mobile SoCs Ready for HPC? ''' In 2013, the largest commodity market in computing is not PCs or servers, but mobile computing, comprising smartphones and tablets, most of which are built with ARM-based SoCs. This paper addresses this question in detail. We analyze the trend in mobile SoC performance, comparing it with the similar trend in the 1990s. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/pa1ZkWp4OLHXlmP [8]] '''Trabajo 9 : Power Monitoring with PAPI for Extreme Scale Architectures and Dataflow-based Programming Models ''' For more than a decade, the PAPI performance monitoring library has provided a clear, portable interface to then hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). This paper provides detailed information about three components that allow power monitoring on the Intel Xeon Phi and Blue Gene/Q. Furthermore, we discuss the integration of PAPI in PARSEC – a task-based dataflow-driven execution engine – enabling hardware performance counter and power monitoring at true task granularity. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/3TbLEHiQc1pbK6S [9]] '''Trabajo 10: A View of Cloud Computing ''' Clearing the clouds away from the true potential and obstacles posed by this computing capability. The goal in this article is to reduce that confusion by clarifying terms, providing simple figures to quantify comparisons between of cloud and conventional computing, and identifying the top technical and non-technical obstacles and opportunities of cloud computing. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/0OVMz50aeiyCQtJ [10]] '''Trabajo 11: Challenges of Memory Management on Modern NUMA Systems ''' Optimizing NUMA systems applications with Carrefour. This article evaluates performance characteristics of a representative modern NUMA system, describes NUMA-specific features in Linux, and presents a memory-management algorithm that delivers substantially reduced memory-access times and better performance. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/MsMRWOYX4dnb4QA [11]] '''Trabajo 12: FPGA Programming for the Masses ''' The programmability of FPGAs must improve if they are to be part of mainstream computing. When looking at how hardware influences computing performance, we have General-purpose processors (GPPs) on one end of the spectrum and application-specific integrated circuits (ASICs) on the other. Processors are highly programmable but often inefficient in terms of power and performance. ASICs implement a dedicated and fixed function and provide the best power and performance characteristics, but any functional change requires a complete (and extremely expensive) re-spinning of the circuits. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/IvhKufIJofcAzkk [12]] '''Trabajo 13: Non-Volatile Storage ''' Implications of the datacenter’s shifting center. FOR THE ENTIRE careers of most practicing computer scientists, a fundamental observation has consistently held true: CPUs are significantly more performant and more expensive than I/O devices. This article reflects on four years of experience building a scalable enterprise storage system using SCMs; in particular, we discuss why traditional storage architectures fail to exploit the performance granted by SCMs, what is required to maximize utilization, and what lessons we have learned Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/mSUHu3aDe4E0lMK [13]] '''Trabajo 14: Abstraction in Hardware System Design ''' Applying lessons from software languages to hardware languages using Bluespec SystemVerilog. THE HISTORY OF software engineering is one of continuing development of abstraction mechanisms designed to tackle ever-increasing complexity. Hardware design, however, is not as current. This article describes Bluespec SystemVerilog (BSV), the design of which was motivated by just such a reconsideration while reusing features from SystemVerilog wherever possible. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/8aHUJmcJT21FZXT [14]]
'''Trabajo 3: The Need for Power Debugging in the Multi-Core Environment '''
 
Debugging an application for power has a wide array of benefits ranging from minimizing the thermal hotspots to reducing the likelihood of CPU malfunction. In this work, we justify the need for power debugging, and show that performance debugging of a parallel application does not automatically guarantee power balance across multiple cores Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/OmFRGor28KAVWS3 [3]]
 
'''Trabajo 4: Re-imagining the Scientific Visualization Interaction Paradigm '''
 
In recent years, powerful scientific visualization tools have emerged but the potential to closely couple these techniques with natural, physical, spatial human-computer interfaces remains largely untapped. To address these issues we outline a research agenda consisting of six major challenges for natural interfaces for visualization. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/8uCAe3GH3evCq2k [4]] '''Trabajo 5: On the Use of Commodity Ethernet Technology in Exascale HPC Systems ''' Exascale systems will require large networks with hundreds of thousands of endpoints. This work identifies the major differences in network requirements from both environments. Based on them, it studies the application of Ethernet to Exascale HPC systems, considering the topology, routing, forwarding table management, and address assignment, with a focus on performanceand power. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/oUBDtWz0HwjEyrT [5]] '''Trabajo 6: Experiences in Speeding Up Computer Vision Applications on Mobile Computing Platforms ''' Computer vision (CV) is widely expected to be the next big thing in mobile computing. n this paper, we investigate ways to speed up demanding CV applications to run faster on mobile devices. We selected KinectFusion (KF) as a representative CV application. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/8UWPJtyH75vaBbY [6]] '''Trabajo 7: Beyond Weiser: From Ubiquitous to Collective Computing ''' Considering the technological changes across computing’s first three generations, how might the next serve humanity? Three critical technologies—the cloud, the crowd, and the shroud of devices connecting the physical and digital worlds—define the fourth generation of collective computing. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/p1ko5UZpARions1 [7]] '''Trabajo 8: Supercomputing with Commodity CPUs: Are Mobile SoCs Ready for HPC? ''' In 2013, the largest commodity market in computing is not PCs or servers, but mobile computing, comprising smartphones and tablets, most of which are built with ARM-based SoCs. This paper addresses this question in detail. We analyze the trend in mobile SoC performance, comparing it with the similar trend in the 1990s. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/pa1ZkWp4OLHXlmP [8]] '''Trabajo 9 : Power Monitoring with PAPI for Extreme Scale Architectures and Dataflow-based Programming Models ''' For more than a decade, the PAPI performance monitoring library has provided a clear, portable interface to then hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). This paper provides detailed information about three components that allow power monitoring on the Intel Xeon Phi and Blue Gene/Q. Furthermore, we discuss the integration of PAPI in PARSEC – a task-based dataflow-driven execution engine – enabling hardware performance counter and power monitoring at true task granularity. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/3TbLEHiQc1pbK6S [9]] '''Trabajo 10: A View of Cloud Computing ''' Clearing the clouds away from the true potential and obstacles posed by this computing capability. The goal in this article is to reduce that confusion by clarifying terms, providing simple figures to quantify comparisons between of cloud and conventional computing, and identifying the top technical and non-technical obstacles and opportunities of cloud computing. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/0OVMz50aeiyCQtJ [10]] '''Trabajo 11: Challenges of Memory Management on Modern NUMA Systems ''' Optimizing NUMA systems applications with Carrefour. This article evaluates performance characteristics of a representative modern NUMA system, describes NUMA-specific features in Linux, and presents a memory-management algorithm that delivers substantially reduced memory-access times and better performance. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/MsMRWOYX4dnb4QA [11]] '''Trabajo 12: FPGA Programming for the Masses ''' The programmability of FPGAs must improve if they are to be part of mainstream computing. When looking at how hardware influences computing performance, we have General-purpose processors (GPPs) on one end of the spectrum and application-specific integrated circuits (ASICs) on the other. Processors are highly programmable but often inefficient in terms of power and performance. ASICs implement a dedicated and fixed function and provide the best power and performance characteristics, but any functional change requires a complete (and extremely expensive) re-spinning of the circuits. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/IvhKufIJofcAzkk [12]] '''Trabajo 13: Non-Volatile Storage ''' Implications of the datacenter’s shifting center. FOR THE ENTIRE careers of most practicing computer scientists, a fundamental observation has consistently held true: CPUs are significantly more performant and more expensive than I/O devices. This article reflects on four years of experience building a scalable enterprise storage system using SCMs; in particular, we discuss why traditional storage architectures fail to exploit the performance granted by SCMs, what is required to maximize utilization, and what lessons we have learned Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/mSUHu3aDe4E0lMK [13]] '''Trabajo 14: Abstraction in Hardware System Design ''' Applying lessons from software languages to hardware languages using Bluespec SystemVerilog. THE HISTORY OF software engineering is one of continuing development of abstraction mechanisms designed to tackle ever-increasing complexity. Hardware design, however, is not as current. This article describes Bluespec SystemVerilog (BSV), the design of which was motivated by just such a reconsideration while reusing features from SystemVerilog wherever possible. Paper: [http://www.sc3.uis.edu.co/owncloud/index.php/s/8aHUJmcJT21FZXT [14]]
 
  
 
===== Calificación de los informes =====
 
===== Calificación de los informes =====

Revision as of 20:01, 25 May 2016

Volver a Cursos

Arquitectura de Computadores - Código 22966

Carlos Jaime Barrios Hernández - (cbarrios@uis.edu.co) Auxiliatura Técnica-Académica : John Anderson García Henao, Ing.

PRESENTACION

El diseño, desarrollo e innovación son palabras que corresponden a la actividad de un ingeniero, cualquiera que sea su área de trabajo. Desde un punto de vista ingenieril la tecnología, es el fruto de la concepción y desarrollo del conocimiento, utilizando herramientas y proyectando una utilidad, incluyendo el diseño de nuevas herramientas. Como ingenieros de sistemas esas herramientas son las maquinas computacionales, las cuales evolucionan con la actualización del conocimiento, que involucra la explotación de nuevos materiales, nuestra capacidad de abstracción y las perspectivas de desarrollo (mas que las necesidades). Si bien el componente técnico/tecnológico de la asignatura arquitecturas de computadores es importante, el solo hecho de utilizar la palabra “arquitectura” involucra una percepción hacia la concepción, el diseño y la organización de los elementos que integran un sistema de cómputo (no solo una máquina computadora), como es la interacción con otros sistemas y con los humanos, observando tendencias, factibilidad, requerimientos de rendimiento, limitaciones tecnológicas y físicas, impacto ambiental entre otros. Aunque la frontera con el conocimiento que involucra otras áreas como la ingeniería electrónica, la física de materiales o la matemática aplicada es frágil, el curso esta dirigido a estudiantes de ingeniería de sistemas y ciencias de la computación, buscando ofrecer fundamentos de arquitectura de sistemas computacionales desde una ubicación histórica. De ahí que se complementen con lecturas acerca del estado del arte en cada una de las secciones propuestas para este curso. El propósito fundamental de esta asignatura durante el presente semestre es establecer un estado de conocimientos fundamentales en arquitectura de computadores, que permita manejar el lenguaje técnico asociado, ubicar temporalmente el desarrollo tecnológico, conociendo el estado del arte en esta área y fundamentar conocimientos que permitan el auto-aprendizaje y profundización en el área, además de la interacción en equipos interdisciplinarios que requieran competencias en arquitectura de sistemas computacionales.

Contenido

  1. Introducción y Fundamentos de Arquitectura de Sistemas de Cómputo
    1. Arquitectura, Organización y Diseño de Sistemas de Cómputo
    2. Desarrollo histórico – Ubicación histórica actual
    3. Clases de Computadoras
    4. Abstracción y Tecnología de Computación – Tendencias
    5. Desempeño
    6. Casos de Estudio
  2. Instrucciones y Aritmética para Computador
    1. Fundamentos de Instrucciones para Computador
      1. Operaciones y Operandos de Hardware de Computadoras
      2. Representación de Instrucciones
      3. Operaciones Lógicas
      4. Instrucciones para la toma de decisiones
      5. Soporte de Procedimientos a nivel de Hardware
      6. Comunicaciones
      7. Arquitectura MIPS
      8. Introducción Paralelismo I – Paralelismo de Instrucciones y el problema de la sincronización
      9. Algunos Aspectos Avanzados
        1. Aspectos Arquitecturales de Compilación
        2. Fundamentos de Diseño Lógico
        3. Mapeo de Hardware
      10. Casos de Estudio
    2. Introducción y Fundamentos de Aritmética para Computador
      1. Adición y substracción
      2. Multiplicación y División
      3. Introducción al Paralelismo II – Aritmética de computadores y el problema de la asociatividad.
      4. Casos de Estudio
  3. Organización y Diseño Arquitectural de Sistemas de Cómputo</b>
    1. Fundamentos de Organización y Diseño
    2. Aspectos Básicos de Procesadores
      1. Aspectos Lógicos de Diseño
      2. Pipeline y Control
      3. Paralelismo y Escalabilidad
      4. Casos de Estudio
    3. Fundamentos de Memoria
      1. Fundamentos de Organización y Diseño
      2. Jerarquía de Memoria
      3. Casos de Estudio
    4. Aspectos Básicos de Almacenamiento
    5. Aspectos Básicos de Comunicaciones y Conectividad
      1. Conectividad Interna
      2. Interconectividad y Redes (Introducción)
    6. Fundamentos de I/O, Gráficas e Interfaces
    7. Casos de Estudio
  4. Tendencias y Direcciones Futuras</b>
    1. Arquitecturas Híbridas
    2. Arquitecturas Reconfigurables
    3. Aspectos Energéticos, Ecológicos y Ambientales
    4. Arquitecturas Escalables, de Gran Escala y Ecosistemas
    5. ARMS (Advanced RISC Architectures) y Computadores Embebidos.
    6. EXASCALE y otras direcciones

ASPECTOS METODOLOGICOS

  • Seminarios Teóricos
  • Seminarios Magistrales
  • Seminarios con Invitados
  • Sesiones Teórico Prácticas / Análisis de Casos
  • Lecturas Sugeridas (En español y en Inglés)
  • Webminars y Videoconferencias

MATERIAL DEL CURSO

El material presentado, fundamentalmente son las diapositivas presentadas durante las sesiones tanto teóricas como los talleres. Es importante resaltar que la mayoría del material se encuentra en inglés. Esto con el fin de acostumbrar la consulta en inglés, debido a que las especificaciones y la bibliografía y fuentes de información "de punta" en tecnología están estandarizadas en inglés. Sesiones Teóricas (II Semestre de 2015)

Sesiones Teóricas (I y II Semestre de 2014)

Sesiones Teóricas (Hasta el II Semestre de 2013)

EVALUACIONES

1. Evaluación No. 1 ( 30%)

  • Tipo de Participación y Tiempo Programado: En Parejas, 90 minutos
  • Recursos a Usar: Solo lapiz y papel. NO SE PERMITIRÁ INTERACCIÓN ENTRE GRUPOS DIFERENTES
  • Aspectos a Evaluar: Ubicación en el estado del arte y realidad histórica, sensibilidad hacia el desarrollo tecnológico e identificación de tendencias y perspectivas, conocimiento de la fundamentación de organización y componentes de sistemas de computo, posibilidades actuales técnicas (teniendo en cuenta la realidad del mercado local), matemática computacional y abstracción
  • Secciones del curso de guía para la evaluación de acuerdo al contenido del curso: 1., 2. (Principalmente las secciones 2.1.1., 2.1.2.; y de la sección 2.2., las partes 2.2.1., y 2.2.2.)
  • EJEMPLO DE SOLUCIÓN A LA EVALUACIÓN 1 (2-2012):

2. Evaluación No. 2 (30%) Martes 29 de Febrero de 2016 (Hora de Clase)

  • Tipo de Participación y Tiempo Programado: Individual - Individual, 90 Minutos
  • Recursos a Usar: Se permitén apuntes de clase, pero no la interacción con otras personas.
  • Aspectos a Evaluar: Conocimientos ténicos de los aspectos vistos en clase y en exposiciones. En tres preguntas realizadas, el estudiante demostrará sus competencias desarrolladas al manejar aspectos ténicos vistos en el desarrollo de la materia.
  • Secciones del Curso: Prácticamente todas.

Trabajo de Aplicación (40%) Entrega Final: lunes 15 de Febrero - Sustentación: lunes 17 y miercoles 22 de febrero

Instrucciones Trabajo de Aplicación Arquitectura de Computadores:
Grupo de Trabajo: Se establece 2 personas para cada grupo de trabajo, al cual se le hace entrega de un articulo enfocado a un area de aplicación de Arquitectura de Computadores.
Objetivo: Analizar el articulo propuesto para identificar sus componentes actuales y sus dependencias para extraer y presentar una abstracción del sistema como si fueran los autores del articulo.
Entrega Final: Se debe entregar una sintesis de 3 paginas en español para el 15 de febrero.
Sustentación: Los grupos se seleccionarán de manera aleatoria, los días 17 y 22 de febrero. Cada grupo dispondrá de 10 minutos para presentar realizar su presentación. En este sentido, se debe vender el articulo, con la contribución dada:
Cual es la contribución principal? Porque es importante? Comparación con el estado del arte?
Revisar el estado del arte para comparar trabajos similares o competidores y decir porque ese es el mejor..
Lista de Trabajos
Trabajo 1 : Brain-Computer Interfaces: Beyond Medical Applications

Brain-computer interaction has already moved from assistive care to applications such as gaming. Improvements in usability, hardware, signal processing, and system integration should yield applications in other nonmedical areas. Paper: [1]

Trabajo 2 : The Netflix Challenge: Datacenter Edition

The hundreds of thousands of servers in modern warehouse-scale systems make performance and efficiency optimizations pressing design challenges. This work presents ADSM, a scalable and efficient recommendation system for application-to-server mapping in large-scale datacenters (DCs) that is QoS-aware. Paper: [2] Trabajo 3: The Need for Power Debugging in the Multi-Core Environment Debugging an application for power has a wide array of benefits ranging from minimizing the thermal hotspots to reducing the likelihood of CPU malfunction. In this work, we justify the need for power debugging, and show that performance debugging of a parallel application does not automatically guarantee power balance across multiple cores Paper: [3] Trabajo 4: Re-imagining the Scientific Visualization Interaction Paradigm In recent years, powerful scientific visualization tools have emerged but the potential to closely couple these techniques with natural, physical, spatial human-computer interfaces remains largely untapped. To address these issues we outline a research agenda consisting of six major challenges for natural interfaces for visualization. Paper: [4] Trabajo 5: On the Use of Commodity Ethernet Technology in Exascale HPC Systems Exascale systems will require large networks with hundreds of thousands of endpoints. This work identifies the major differences in network requirements from both environments. Based on them, it studies the application of Ethernet to Exascale HPC systems, considering the topology, routing, forwarding table management, and address assignment, with a focus on performanceand power. Paper: [5] Trabajo 6: Experiences in Speeding Up Computer Vision Applications on Mobile Computing Platforms Computer vision (CV) is widely expected to be the next big thing in mobile computing. n this paper, we investigate ways to speed up demanding CV applications to run faster on mobile devices. We selected KinectFusion (KF) as a representative CV application. Paper: [6] Trabajo 7: Beyond Weiser: From Ubiquitous to Collective Computing Considering the technological changes across computing’s first three generations, how might the next serve humanity? Three critical technologies—the cloud, the crowd, and the shroud of devices connecting the physical and digital worlds—define the fourth generation of collective computing. Paper: [7] Trabajo 8: Supercomputing with Commodity CPUs: Are Mobile SoCs Ready for HPC? In 2013, the largest commodity market in computing is not PCs or servers, but mobile computing, comprising smartphones and tablets, most of which are built with ARM-based SoCs. This paper addresses this question in detail. We analyze the trend in mobile SoC performance, comparing it with the similar trend in the 1990s. Paper: [8] Trabajo 9 : Power Monitoring with PAPI for Extreme Scale Architectures and Dataflow-based Programming Models For more than a decade, the PAPI performance monitoring library has provided a clear, portable interface to then hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). This paper provides detailed information about three components that allow power monitoring on the Intel Xeon Phi and Blue Gene/Q. Furthermore, we discuss the integration of PAPI in PARSEC – a task-based dataflow-driven execution engine – enabling hardware performance counter and power monitoring at true task granularity. Paper: [9] Trabajo 10: A View of Cloud Computing Clearing the clouds away from the true potential and obstacles posed by this computing capability. The goal in this article is to reduce that confusion by clarifying terms, providing simple figures to quantify comparisons between of cloud and conventional computing, and identifying the top technical and non-technical obstacles and opportunities of cloud computing. Paper: [10] Trabajo 11: Challenges of Memory Management on Modern NUMA Systems Optimizing NUMA systems applications with Carrefour. This article evaluates performance characteristics of a representative modern NUMA system, describes NUMA-specific features in Linux, and presents a memory-management algorithm that delivers substantially reduced memory-access times and better performance. Paper: [11] Trabajo 12: FPGA Programming for the Masses The programmability of FPGAs must improve if they are to be part of mainstream computing. When looking at how hardware influences computing performance, we have General-purpose processors (GPPs) on one end of the spectrum and application-specific integrated circuits (ASICs) on the other. Processors are highly programmable but often inefficient in terms of power and performance. ASICs implement a dedicated and fixed function and provide the best power and performance characteristics, but any functional change requires a complete (and extremely expensive) re-spinning of the circuits. Paper: [12] Trabajo 13: Non-Volatile Storage Implications of the datacenter’s shifting center. FOR THE ENTIRE careers of most practicing computer scientists, a fundamental observation has consistently held true: CPUs are significantly more performant and more expensive than I/O devices. This article reflects on four years of experience building a scalable enterprise storage system using SCMs; in particular, we discuss why traditional storage architectures fail to exploit the performance granted by SCMs, what is required to maximize utilization, and what lessons we have learned Paper: [13] Trabajo 14: Abstraction in Hardware System Design Applying lessons from software languages to hardware languages using Bluespec SystemVerilog. THE HISTORY OF software engineering is one of continuing development of abstraction mechanisms designed to tackle ever-increasing complexity. Hardware design, however, is not as current. This article describes Bluespec SystemVerilog (BSV), the design of which was motivated by just such a reconsideration while reusing features from SystemVerilog wherever possible. Paper: [14]

Calificación de los informes
  • Informe de Avance (10%) ⭢ 3 páginas, Formato libre. Envio por correo con el asunto "Informe de Avance Equipo XX" en un archivo en pdf donde debe contener: presentación de problema y como va a resolver ese problema (ojo, no la solución del problema sino como lo va a resolver). Fecha y hora limite de envio a los emails del profesor e instructora: 04/11/2014 23:59 (GMT - 5)
  • Informe Final (10%)⭢ 8 páginas. Tipo Artículo. Envio por correo con el asunto "Entrega Final Equipo XX" en un archivo en pdf donde debe contener la solucioón del problema. Fecha y hora limite de envio a los emails del profesor e instructora: 06/02/2015 23:59 GMT - 5)
  • Propuesta/Solución (10%), Evaluada del articulo y la presentación.
  • Presentación Oral (10%) (Martes 10 de febrero de 2015. De 16:00 a 19:00). Presentación exacta de 8 minutos (5 minutos mas 3 minutos de preguntas). Usar diapositivas y debe presentarse lo mas relevante del trabajo.

Notas

BIBLIOGRAFÍA Y FUENTES DE INFORMACION

1. Patterson and Hennesy, Computer Organization and Design (The Hardware, Software Interface)

2. Patterson and Hennesy, Computer Architecture; A Quantitative Approach 3. TED Talks

Artículos y Presentaciones Finales